Architecture and Design of a High Definition Television Production Switcher

In late 1996, the Federal Communications Commission ruled the United States would migrate to a digital television broadcasting system. The Commission chose the Grand Alliance transmission scheme and left the picture scanning format to the marketplace. High Definition video, at 1920 times 1080 pixels, interlaced scanning, at a nominal 60 Hertz field rate is one format in the infamous Table 3 of the ATSC document and FCC ruling. This picture format is also well on the way to becoming a universal format. — A new series of digital systems, conforming to the interlaced scanning format of SMPTE 274M- 1995 were recently introduced by Sony. This paper deals with the architecture, enabling technologies, and capabilities of a live and post production vision mixer from this family of equipment. — A modern, digital, high definition vision mixer, and associated digital effects and editing equipment, must provide producers, directors, and the artistic and technical staff employing them with similar capabilities as existing standard definition equipment—the visual effects expected by a sophisticated audience. These requirements are detailed in this paper and the vision mixer described is compared to similar standard definition devices. — The capabilities of the switcher resulted in an architecture for crosspoints, mix effects systems, key and video processing, control and external interfaces. Operational and maintenance aspects are also key factors in an architecture and include considerations for size, mass, power consumption and heat loads. Picture size and shape may change but control room and remote broadcast vehicle designs dictate limitations on these specifications. Trade-offs in capability and architecture are enumerated. — The data rates employed in HDTV (more than 5 times the rate of SMPTE 125M and SMPTE 259M) required additional new technologies, including the development of a series of Application Specific Integrated Circuits which perform the same functions employed in a standard definition product but at the higher data rate. These ASICs and their functions are described.

Published

1997-11

Content type

Original Research

DOI

10.5594/M00238

ISBN

978-1-61482-928-7