Architectures for High-Definition MPEG Encoders

The paper discusses architectures for MPEG-2 encoders capable of operating at High Level as required for the transmission of high-definition television. The computational requirements of such an encoder cannot be met today by a single process; some degree of segmentation or parallel processing is required. — Some designs of high-definition encoder achieve this segmentation at a system level by dividing the high-definition image among a number of standard-definition encoders and subsequently combining the encoded datastreams. This approach offers simplicity of design and may appear to offer certain advantages to the user. — The paper discusses various aspects of the operation of encoders, including the coding of I-frames, the generation and coding of motion vectors, and bit allocation. It describes a number of problems with this type of segmentation, and shows that optimal efficiency cannot be achieved. The paper further suggests that the apparent user benefits are difficult to realize, and concludes that a purpose-designed “full-frame” high-definition encoder provides a superior solution.

Published

1999-07

Content type

Original Research

DOI

10.5594/M001192

ISBN

978-1-61482-948-5