All-IP Video Processing of SMPTE 2022-6 Streams on an All Programmable SoC

Realizing the functions of routing, switching and video processing equipment while utilizing standard networking equipment for video transport provides an evolutionary step toward gaining the benefits of professional media networking in broadcast environments. This paper describes a fully networked broadcast platform based on the Xilinx Zynq-7000 All Programmable System on a Chip (SoC) that performs live video processing, similar to that of traditional broadcast equipment switchers and routers, but uses 10 GbE networking interfaces for uncompressed video transport. HD-SDI video only enters and exits a 10 GbE network through SMPTE 2022-6 bridges based on the Xilinx Kintex-7 FPGA. The demonstration platform is connected using a standard off-the-shelf 10 GbE switch showing the vision of a networked broadcast facility.

Published

2013-10

Content type

Original Research

Keywords

100 GbE, 10 GbE, 1588, 3G, 400 GbE, 40 GbE, 4k, 8k, A9, ARP, bridge, broadcast facility, compression, control, Cortex, Cortex A9, destination port, dual Cortex A9, DVB/ASI, effects, embedded processing, embedded processor, Ethernet, Ethernet switch, FPGA, FTP, Gigabit Ethernet, HD, ICMP, IGMP, integrated receiver decoder, IEEE 1588, IP, IRD, JPEG, JPEG 2000, L2, L3, mix/effects, multicast, processor, programmable logic, router, routing matrix, RS422, RTP, SD, SDI, SMPTE2022-1, SMPTE2022-2, SMPTE2022-5, SMPTE2022-6, SoC, source port, System on a Chip, transmission, UDP, UHDTV1, UHDTV2, video routing matrix, video server, Zynq

DOI

10.5594/M001499

ISBN

978-1-61482-953-9